ERSA’2008
The International Conference on
Engineering of Reconfigurable Systems and Algorithms

Monday, July 14, 2008; 07:45 - 08:45pm
Location: Gold Room

Chair: Enno Luebbers, University of Paderborn, Germany

• Non-Volatile Multi-Context FPGAs Using Hybrid Multiple-Valued/Binary Context Switching Signals
  Masanori Hariyama*, Shota Ishihara, Noriaki Idobata, and Michitaka Kameyama
  Tohoku University, Japan
• Design of a Cellular Automata ASIC for Conformal Computing
  Mariam Hoseini, Chao You, and Mark Pavicic
  North Dakota State University, USA
• FPGA Schemes with Optimized Routing for the Advanced Encryption Standard
  Jason Van Dyken, Jose G. Delgado-Frias, and Sirisha Medidi
  Washington State University, USA
• Synthesis of Relocatable Tasks and Implementation of a Task Communication Bus in a General Purpose Hardware System
  Angel Luis Gonzalez Bravo*, Hortensia Mecha Lopez, Julio Septien del Castillo, Sara Roman Navarro, & Daniel Mozos Munoz
  Universidad Complutense de Madrid, Spain
• Performance Evaluation of FPGA-Based Hardware Accelerator: A Case Study
  Yidong Liu, Srinivasan Santhanam, and Jooheung Lee
  University of Central Florida, USA
• FPGA Resource Management Using Internal RAM as Data Cache
  L. Sanchez, J. Septi?n, D. Mozos, and H. Mecha*
  University Complutense of Madrid, Spain
• Resource Management for Hw Multitasking in Three Dimensional FPGAs
  J. A. Valero, J. Septien, D. Mozos, H. Mecha
  University Complutense of Madrid, Spain