ERSA’08 Final Programme
ERSA’08 Accepted Papers
ERSA’08 Short Papers
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SCARS: Scalable Self-Configurable Architecture for Reusable Space Systems
Adarsha Sreeramareddy, Jeff G. Josiah, Ali Akoglu
University of Arizona, USA
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Selection and Use of Programmable Logic in Flight Applications
Gary Block, Paula J. Pingree, Yunling Lou
Jet Propulsion Laboratory, California Institute of Technology, USA
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Multi-Criteria Optimization and Performance Measurement of Domain-Specific
Reconfigurable Architectures Targeting Image and Video Processing Applications
Arjun K Pai(1), Khaled Benkrid(2)
(1)Queen’s University Belfast, UK
(2)The University of Edinburgh, UK
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Dynamically Reconfigurable FFTs for Cognitive Radio on a Multiprocessor Platform
Qiwei Zhang, Karel H.G. Walters, Andre B.J. Kokkeler and Gerard J.M. Smit
University of Twente, The Netherlands
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Design of a Digital Processor for Adaptive Optics
Kolin Paul, Lalit K Bansal, M Balakrishnan
Indian Institute of Technology, India
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High Performance Double Precision Reduction Circuit Implementation in FPGA
Andrea Suardi, Antonio Manenti and Angelo Geraci.
Politecnico di Milano, Italy
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Scalable FPGA Architecture for DCT Computation using Dynamic Partial Reconfiguration
Jian Huang, Matthew Parris, Jooheung Lee, and Ronald F. DeMara
University of Central Florida, USA
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Hardware/Software Co-designed Extended Kalman Filter on an FPGA
Robert Barnes, Aravind Dasu
Utah State University, USA
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A 770ns Holographic Reconfiguration of a Four-Contexts DORGA
Mao Nakajima and Minoru Watanabe
Shizuoka University, Japan
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A FPGA Design for a Decimal Floating-Point Adder
Yongsoon Lee, Andre Ivanov
University of British Columbia, Canada
Luxor