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Industrial Workshop

Synplicity®, Inc. Synplicity®, Inc., USA

Architectural Synthesis for Reconfigurable Computing

Chris Eddington

Speaker: Chris Eddington, Synplicity®, Inc., USA

Abstract:

One of the challenges for reconfigurable computing is the effort required to map algorithms into efficient hardware architectures that meet goals for timing, area, and power. High Level Synthesis (HLS) techniques can automate this process, however they face formidable challenges. Part of the problem is that HLS techniques are very dependent on the capabilities of the target technology which burdens the tools and complicates the optimization search. Another problem is in the algorithm expression or specification. Many popular design languages can be incomplete in the specification of timing and/or precision, or they make assumptions about the underlying architecture that forces it to a particular technology or limits the optimizations.

In this talk we introduce a modeling methodology and an architectural synthesis engine that automatically applies optimization techniques common for signal processing algorithms. This includes techniques for:

  • high level of abstraction using vector operations and automatic quantization
  • IP micro-architectural exploration using gate-level metrics
  • automatic system-wide pipelining for improved performance
  • resource sharing and scheduling for improved area

Design examples will be used to show how the methodology works to simplify algorithm expression, enable architectural exploration, and achieve optimized portability across the latest FPGA devices and ASIC technologies.


BIO:

Chris Eddington, Technical Marketing Manager DSP Products, Synplicity Inc. Chris is responsible for product marketing, definition, and strategy for DSP products at Synplicity. Prior to working at Synplicity he has held a variety of IC design and technical marketing positions in the semiconductor and aerospace industries, including Mellanox Technologies,8x8 Inc., and JPL/NASA. He has successfully developed and supported DSP-based products in wireless communications, video conferencing, and high performance networking. Chris holds a MSEE in Signal and Image Processing from the University of Southern California.


Synplicity®, Inc.

Synplicity®, Inc. (Nasdaq: SYNP) is a leading supplier of innovative IC design and verification solutions that serve a wide range of communications, military/aerospace, semiconductor, consumer, computer, and other electronic applications markets. Synplicity's FPGA implementation tools provide outstanding performance, cost and time-to-market benefits by simplifying, improving and automating logic synthesis, physical synthesis, analysis and debug for programmable logic designs. Synplicity's ESL synthesis solutions significantly improve productivity for DSP designs realized in ASIC and FPGA devices. The ConfirmaT at-speed verification platform, comprising software tools and the HAPST family of prototyping systems, enables both comprehensive verification of ASIC, ASSP and SoC designs and software development prior to chip tapeout. Synplicity is the number one supplier of FPGA synthesis tools and its physical synthesis and ASIC verification technologies are the recipients of several prestigious industry awards. The company operates in over 20 facilities worldwide and is headquartered in Sunnyvale, California. For more information visit http://www.synplicity.com.

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