Conference Programme
Proposed Technical Session
Reconfigurable Computing for Space Based Applications
Chairman: Dr. Aravind R Dasu, Utah State University, USA
Abstract:Embedded stand-alone microprocessors have long been the workhorse of space-based computers. But the demands to explore deeper into space and obtain greater return in science per mission has spurred the need to explore more powerful alternatives that can support a suite of algorithms related to both data processing as well as command and control, which are far too complex for traditional space based microprocessors.
Modern FPGAs with a complex and rich fabric consisting of embedded processors, memory units, DSP blocks and offering features such as partial-dynamic reconfiguration, selective SEU/MEU fault protection circuits for routing/logic, are becoming increasingly attractive as the future of space based computing systems.
But their very richness of components and features, make porting applications onto them a challenging task, opening up possibilities of optimizations and novel techniques at a multitude of levels, some of which are listed below (and serve as guidelines for topics of the technical session):
Software/algorithms customized for space based applications to be ported onto FPGAs:
- Data compression in domains such as image, hyper-spectral data etc.,
- Mission planning/autonomy oriented algorithms, Navigation/guidance etc.
- Design automation tools for VLSI architecture optimization, power reduction etc.
Hardware customized for space based FPGAs:
- Hardware-software co-design
- Partial-dynamic reconfiguration
- Selective fault tolerance/mitigation circuits
- Low power designs
- Non-standard low complexity floating-point arithmetic circuits
- Highly parallel/pipelined VLSI-architectures.
- Multi-FPGA systems for scalable performance
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